Difference between revisions of "John Backes"

From The Circuits and Biology Lab at UMN
Jump to navigationJump to search
(About John)
(John's Papers)
Line 63: Line 63:
  
 
'''Conference Papers'''
 
'''Conference Papers'''
 +
 +
{|
 +
 +
| rowspan=2 |
 +
{| style="background:#F0E68C"
 +
|- valign=top
 +
|  width="100" | '''title''':
 +
|  width="550" | [[Media:Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf‎‎‎ | Resolution Proofs as a Data Structure For Logic Synthesis]]
 +
|-
 +
| '''authors''':
 +
| John Backes and [[Marc Riedel]]
 +
|-
 +
| '''presented at''':
 +
| [http://iwls.org/ The International Workshop On Logic Syntehsis], San Diego, CA, 2011.
 +
|}
 +
 +
| |        
 +
 +
| align=center |
 +
<span class="plainlinks">[http://www.mriedel.ece.umn.edu/wiki/images/2/27/Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf http://cctbio.ece.umn.edu/wiki/images/0/04/Pdf.jpg]</span>
 +
<br>[[Media:Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf  | Paper]]
 +
 +
| | &nbsp; &nbsp; &nbsp; &nbsp;
 +
 +
|}
  
 
{|
 
{|

Revision as of 15:22, 3 May 2011

John Backes.jpg

About John

My research interests include logic synthesis, formal verification, technology mapping, and SAT-based algorithms.

John's Papers

Journal Papers

title: The Analysis and Mapping of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett and Marc Riedel
submitted to: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010.
       

Pdf.jpg
Paper

title: The Synthesis of Stochastic Circuits for Nanoscale Computation
authors: Weikang Qian, John Backes, and Marc Riedel
presented at: International Journal of Nanotechnology and Molecular Computation, 2010.
       

Pdf.jpg
Paper

       

Ppt.jpg
Slides

Conference Papers

title: Resolution Proofs as a Data Structure For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Workshop On Logic Syntehsis, San Diego, CA, 2011.
       

Pdf.jpg
Paper

       
title: Reduction of Interpolants For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2010.
presented at: International Workshop on Logic and Synthesis, Irvine, CA, 2010.
       

Pdf.jpg
Paper

       

Ppt.jpg
Slides

title: The Synthesis of Cyclic Dependencies with Craig Interpolation
authors: John Backes and Marc Riedel
presented at: International Workshop on Logic and Synthesis, Berkeley, CA, 2009.
       

Pdf.jpg
Paper

       

Ppt.jpg
Slides

title: The Analysis of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2008.
       

Pdf.jpg
Paper

       

Ppt.jpg
Slides

Contact Information

  • Email: BackesEmail.gif
  • Phone: (952) 239-7828