Difference between revisions of "John Backes"

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(John's Papers)
(John's Papers)
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|  width="100" | '''title''':
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|  width="500" | [[Media:Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf‎‎‎ | Using Cubes of Non-state Variables With Property Directed Reachability]]
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| [http://www.date-conference.com/ Design Automation & Test in Europe], Grenoble, France, 2013.
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<span class="plainlinks">[http://www.mriedel.ece.umn.edu/wiki/images/2/27/Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf http://cctbio.ece.umn.edu/wiki/images/0/04/Pdf.jpg]</span>
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<br>[[Media:Backes_Riedel_Resolution_Proofs_As_A_Data_Structure_For_Logic_Synthesis.pdf  | Paper]]
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<span class="plainlinks">[http://www.mriedel.ece.umn.edu/wiki/images/5/5e/Iwls2011final_final.ppt http://cctbio.ece.umn.edu/wiki/images/3/36/Ppt.jpg]</span>
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<br> [http://cctbio.ece.umn.edu/wiki/images/f/f1/Backes_Riedel_Resolution_Proofs_as_a_Data_Structure_for_Logic_Synthesis.ppt Poster]
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Revision as of 22:42, 5 April 2013

John Backes.jpg

About John

My research interests include logic synthesis, formal verification, technology mapping, and SAT-based algorithms.

John's Papers

Journal Papers

title: The Synthesis of Cyclic Dependencies with Boolean Satisfiability
authors: John Backes and Marc Riedel
will appear in: ACM Transactions on Design Automation of Electronic Systems, 2012.

Pdf.jpg
Paper

title: The Analysis and Mapping of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett, and Marc Riedel
submitted to: Journal on Satisfiability, Boolean Modeling and Computation, 2011.

Pdf.jpg
Paper

title: The Synthesis of Stochastic Circuits for Nanoscale Computation
authors: Weikang Qian, John Backes, and Marc Riedel
appeared in: International Journal of Nanotechnology and Molecular Computation,
vol. 1, no. 4, pp. 39–57, 2010.

Pdf.jpg
Paper

Conference Papers

title: Using Cubes of Non-state Variables With Property Directed Reachability
authors: John Backes and Marc Riedel
presented at: Design Automation & Test in Europe, Grenoble, France, 2013.

Pdf.jpg
Paper

Ppt.jpg
Poster


title: Resolution Proofs as a Data Structure For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Workshop on Logic Synthesis, La Jolla, CA, 2011.

Pdf.jpg
Paper

Ppt.jpg
Slides

title: Reduction of Interpolants For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2010.

Pdf.jpg
Paper

Ppt.jpg
Slides

title: The Synthesis of Cyclic Dependencies with Craig Interpolation
authors: John Backes and Marc Riedel
presented at: The International Workshop on Logic and Synthesis, Berkeley, CA, 2009.

Pdf.jpg
Paper

Ppt.jpg
Slides

title: The Analysis of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett, and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2008.

Pdf.jpg
Paper

Ppt.jpg
Slides

Contact Information

  • Email: BackesEmail.gif
  • Phone: (952) 239-7828